HiPEAC 2025

CompContinuum: Computing Continuum of Cloud, Edge, and IoT Technologies

Workshop: 10:00-13:30, January 22nd, 2025 (HiPEAC 2025)

This year the HiPEAC 2025 conference takes place in beautiful Barcelona, Spain. Associated workshops, tutorials, special sessions, several large poster sessions and an industrial exhibition will run in parallel with the conference. We’re excited to announce our participation in the CompContinuum workshop: Computing Continuum of Cloud, Edge, and IoT Technologies (see agenda below).

10:00: Welcome, Agenda overview
10:05: Invited talk – “RISC-V for HPC: Experiences and Perspective from the eProcessor project”

Abstract: The eProcessor project aims at creating a RISC-V full stack ecosystem for HPC, cloud and IoT systems. The eProcessor architecture combines a high-performance out-of-order core with energy-efficient accelerators for vector processing and AI with reduced-precision functional units. The design of this architecture follows a hardware/software co-design approach with relevant application use cases from the HPC, IoT, bioinformatics and AI domains. One relevant use case is a smart mirror that aids to increase the safety, health, well-being and confort of smart homes. The smart mirror allows the user to display the current state of the home and to control the different functionalities IoT devices. Additionally, it assists the resident in everyday usage scenarios, e.g., displaying the upcoming departure times of the tram, fuel prices, news articles, bus schedules, or showing the latest football results. The smart mirror equips multiple sensors and cameras to detect and identify the user and can be controlled by natural hand gestures as well as via voice commands. The smart mirror leverages the eProcessor architecture, specially the AI accelerator, for efficiently performing object detection, gesture detection and face recognition. Another relevant use case is the DeepHealth toolkit, a software ecosystem developed in the DeepHealth European project that provides open-source libraries for AI and computer vision for medical applications. The aim of the DeepHealth project is to develop a framework to aid the medical professionals at diagnosing deseases from biomedical images. To this end, the DeepHealth toolkit provides a web service that allows to easily trigger the design, train and test of predictive models as well as the pre- and post- processing of medical images without writing any code. On the back-end side, the DeepHealth toolkit performs all these operations by means of two libraries (EDDL and ECVL) that run distributed DNNs training on hybrid HPC and cloud infrastructures based on CPUs, GPUs or FPGAs.

Speaker: Lluc Alvarez is a researcher at the Barcelona Supercomputing Center (BSC). He received his B.Sc. degree from the Universitat de les Illes Balears (UIB) in 2006 and his M.Sc. and Ph.D. degrees from the Universitat Politècnica de Catalunya (UPC) in 2009 and 2015, respectively. Currently he is the leader of the ‘UNCORE: Cache Hierarchies and Interconnects’ group at BSC and the principal investigator of the eProcessor project. His main research interests are cache hierarchies and on-chip interconnection networks for high-performance computing systems, accelerators for bioinformatics applications, benchmarking and performance verification of microprocessors.

10:45: “METASAT: A Qualifiable RISC-V Hardware and Software Platform for Future Space Systems – Overview and highlight results”

Abstract: The Horizon Europe METASAT project has finished in December 2024. The RISC-V based METASAT space platform developed in the project was prototyped on an FPGA as well as in a virtual twin, and includes a multicore NOEL-V space processor from Frontgrade Gaisler which is enhanced with the SPARROW AI short vector accelerator and a Vortex RISC-V GPU. A qualifiable software stack was developed for the platform, based on RTEMS and the XtratuM hypervisor, as well as a model-based design infrastructure for managing the increased software complexity of the multicore, GPU and AI accelerator. The project demonstrator includes 6 use cases running in parallel in our mixed criticality platform, on different cores of the platform within separate hypervisor partitions. The use cases range from flight software from an existing mission ported to the METASAT platform and intefaced with an Electrical Ground Support Equipment (EGSE) system, to novel high performance AI-based space solutions. In this presentation, we will cover the different elements of the hardware and software stack and present the main outcomes of the demonstrator.

Speaker: Leonidas Kosmidis is a senior researcher with the Barcelona Supercomputing Center. His research interests include hardware design and low-level software for real-time systems and embedded accelerators. He received a PhD in computer architecture from the Polytechnic University of Catalonia, and he previously studied at the University of Crete. He coordinates the METASAT project.

11:00: Break (30 min)
11:30: “Towards a Complete RISC-V Hardware-Software Stack for Cloud Services: Experiences and Perspective from the VITAMIN-V Project”

Abstract: History teaches us that any new hardware without good and widely-used software on top has no future. Countless examples exist even from the biggest manufacturers (e.g. Intel Itanium, IBM Cell, …) without even considering competition (e.g Sun Microsystems’s Ultrasparcs, Digital’s Alphas, HP’s …). Regardless of the nostalgia and to ensure RISC-V is successful beyond small controllers, software and -specially- widely used software suites require the focus now to avoid repeating the errors of the past. The Vitamin-V project brings together researchers and developers in the open-source software arena to provide a first set of cloud suites (and underlaying software stack) in VM-based, container-based and serverless cloud areas where RISC-V can be deployed.

Speaker: Ramon Canal is a professor at UPC-Barcelona Tech. He received the MS and PhD degrees from the UPC. He worked at Sun Microsystems in 2000, and he was a Fulbright visiting scholar at Harvard University in 2006/2007 and a visiting professor at the University of Cyprus 2019/2020. He was the associate-dean of postgraduate studies at the Barcelona School of Informatics (UPC) 2013-2017. His current research efforts are focused on technology modelling, reliability and adaptability of memories and architectures. He takes a cross-layer approach from circuits to OS focusing on Cloud architectures. He coordinates the VITAMIN-V project.

11:50:  “Building an Open Source Cloud Blueprint: Experiences and Perspective from the OpenCUBE Project”

Abstract: The OpenCUBE project aims to design, implement, and validate a full open-source software stack for a Cloud computing blueprint deployed on EPI hardware. Together with the software stack, a reference platform will be delivered atop European hardware infrastructure with heterogeneous compute nodes equipped with SiPearl Rhea processors and Semidynamics RISC-V accelerator. Societal impactful workloads for European weather forecasting, drug discovery, machine learning in space, will be enabled on the blueprint, further driving adoption of consumer and industrial cloud workloads and enabling emerging workflows on the cloud and HPC computing continuum.

Speaker: Stefan Markidis is a Professor of Computer Science with specialization in high-performance computing systems, including supercomputers and quantum computers. Markidis holds a Ph.D. from the University of Illinois at Urbana-Champaign and an MS from Politecnico di Torino. Before joining KTH, he was a researcher at the Los Alamos National Laboratory, Lawrence Berkeley National Laboratory, and KULeuven. He is the project manager of the OpenCUBE project.

12:10: “Unleashing Acceleration Capabilities in the EU Hardware Ecosystem through the AERO Project”

Abstract: The European Processor Initiative (EPI) represents a groundbreaking effort to establish European leadership in processor design, fostering innovation and technological autonomy. Complementing this endeavor, the EU-funded AERO project plays a pivotal role in creating a robust open-source software ecosystem to maximize the potential of EPI hardware. This talk will highlight the emerging hardware acceleration capabilities of the EU processor and demonstrate how these can be seamlessly utilized through the AERO software stack. Attendees will gain insights into enhancing performance of Java workloads using cutting-edge tools provided by AERO, while exploring strategies for effortless integration into European cloud infrastructure. Join us to discover how AERO is bridging the gap between advanced hardware and software, paving the way for a competitive and sustainable European computing ecosystem.

Speaker: Thanos Stratikopoulos obtained his PhD degree in computer science from the University of Manchester in 2019. His PhD thesis focused on the hardware acceleration of system software for novel storage technologies. Since December 2018, he has been a member of the TornadoVM team. Recently he was awarded a grant by Innovate UK to undertake market exploration for TornadoVM. Additionally, he has been appointed by the University of Manchester as Impact Champion to facilitate researchers of the university towards productizing their research assets. Finally, he is involved in several EU Horizon 2020, EU Horizon Europe, and UKRI projects and his interests include computer architecture, high-performance computing, virtualization and cloud acceleration.

12:30: “Towards RISC-V systems for Cloud Services: Experiences and Perspective from the RISER and HIGHER projects”

Abstract: Can we design and build data-center system platforms based on open standards in Europe today? This talk will outline the experiences and roadmap of two ongoing research and innovation projectsthat have taken up this challenge. RISER (started in Jan’23) is progressing towards a first-generation of all-European RISC-V cloud accelerator and cloud server stand-alone prototypes, operating with fully-featured operating systems and runtimes. HIGHER project (started in Jan’25) follows the Open Compute Project (OCP) Server family of standards to build processor modules for computation and acceleration, alongside a system security/control module. The combined effort in the two projects aims to build modular rack-scale systems, incorporating reusable standards-based infrastructure that encompasses hardware, low-level firmware, and systems software, while ensuring trustworthy functionality for managing, securing, and controlling servers.

Speaker: Manolis Marazakis is a principal staff research scientist at the Institute of Computer science, FORTH (Greece). His research interests are in architectures and efficient systems software for high-performance servers in data center environments. He is the coordinator of the RISER and HIGHER projects.

12:50 – 13:00: Closing remarks

For more information about this workshop please visit the HiPEAC website.

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