Announcing ETP4HPC webinar: OpenCUBE & RISER

Two projects to advance European cloud platforms

28-03-2025 @ 11:00 to 12:00 (CET)

The OpenCUBE project will deliver the first deployment-ready cloud platform powered by processors made in Europe. Working alongside the European Processor Initiative (EPI) in designing and developing European chips, the OpenCUBE project focuses on building a complete software stack to enhance performance, energy efficiency, and ease of programming in heterogeneous data centres. Through pilot use cases, OpenCUBE aims to simplify adoption and drive user engagement with the upcoming European cloud platform.

Phase 1 of the pilot system has been running for 1 year, facilitating software development and testing, from operating system, system management, cloud orchestration, programming environment and tooling level to application porting, across ARM and (FPGA-emulated) RISC-V vector coprocessors, networked using Ultra-Ethernet Slingshot interconnect. Pilot applications range from drug discovery workflows to a demonstration of an OpenFAM backend for ECMWFs Field Database (FDB), core of the Destination Earth platform.

They will present a progress update and discuss learnings made along the way.

Can we design and build data-center system platforms based on open standards in Europe today? This presentation will outline the experiences and roadmap of an ongoing research and innovation project that has taken up this challenge. The RISER project is progressing towards a first-generation of all-European RISC-V cloud accelerator and cloud server stand-alone prototypes, operating with fully-featured operating systems and runtimes. Building on top of outcomes from the EPI and EUPILOT projects, RISER aims to develop the first all-European RISC-V cloud server infrastructure, aiming to enhance Europe’s open strategic autonomy, and become a technology enabler for larger EU initiatives.

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Speakers

Utz-Uwe Haus, Head of the HPE HPC/AI EMEA Research Lab (ERL), studied mathematics and computer science at the Technical University of Berlin (TU Berlin). After obtaining a doctorate in mathematics at the University of Magdeburg (Germany) he worked on nonstandard applications of mathematical optimization in chemical engineering, material science, and systems biology. He led a junior research group at the Magdeburg Center for Systems Biology and was principal investigator on various EU FP7 ITN projects. After five years as senior researcher at the Department of Mathematics at ETH Zürich, he co-founded CERL, the CRAY EMEA Research Lab in 2015. He’s now leading the HPE ERL, a team dedicated to fostering long term technical relationships with customers and partners in Europe and beyond, and performing co-design of solutions outside the current product portfolio. His research interests focus on parallel programming and data transfer-aware scheduling problems, monitoring and operational data analysis, as well as novel compute architectures. He is the technical coordinator of the OpenCUBE project.

Craig Prunty is Vice President of Marketing & Business Development at SiPearl. As business development and product marketing expert in the global high-performance computing (HPC) market, Craig Prunty has spent the majority of his career in France and California with global semiconductor companies (Marvell Semiconductor, Cavium, AppliedMicro), contributing to the commercial success of several product lines. In his various positions, he has been engaged in industry consortiums and has built up a robust global network of partners. Prior to moving to SiPearl, Craig was Marketing Director for Marvell Semiconductor’s server processors division in Santa Clara, California. He has successfully developed new markets including high-performance computing harnessing Arm technology. A dual French and American national, Craig has a Master in Electrical Engineering from San Diego State University.

Xavier Teruel received the Computer Engineering degree and the Master on Computer Architecture, Network and Systems at Technical University of Catalonia (UPC) in 2006 and 2008, respectively. Since 2006 he is working as a researcher within the Computer Science department at the Barcelona Supercomputing Center (BSC); and since 2018 he is leading the Best Practices for Performance and Programmability (BePPP) team.
His research interests include the areas of programming languages, compilers, applications, performance analysis, and co-design for high-performance computing. He has published several papers in international workshops, conferences and journals in these topics.

Manolis Marazakis is a Principal Staff Research Scientist at the Foundation for Research and Technology – Hellas (FORTH – Greece). His research interests are in architectures and efficient systems software, mainly resource management and storage I/O middleware, for high-performance servers in data center environments. He has contributed to the design, implementation and performance analysis of several system prototypes for HPC, data analytics, multi-tenant workloads, and the convergence of HPC and Cloud infrastructures. He is a senior member of ACM and IEEE, and a member of the USENIX Technical Society.